The present invention relates to a semiconductor memory device, and more particularly to a static random access memory (briefly called as SRAM) device, in which the stability of the cell can be improved during read/write operation.
Recently, the integrity of the semiconductor memory device has been tremendously increased. The semiconductor memory device can be roughly divided into two types: one is read/write memory and the other is read only memory. As the read/write memory, there are in turn two types: dynamic random access memory (DRAM) and static random access memory (SRAM). DRAM typically includes a number of unit memory cells which are composed of one transistor and one capacitor. Thus, DRAM is preponderant over any other memory device in integration.
However, since DRAM requires large power consumption, SRAM is more preferable in the field where high speed operation and low power consumption are requested.
As well known, since the unit cell of SRAM is generally composed of 6 transistors or composed of 4 transistors and 2 resistors, which constitutes a latch, SRAM is considerably excellent semiconductor memory device in reduction of power consumption.
However, there is a problem in that, when SRAM is driven into low power voltage and/or at low temperature, the cell stability of SRAM is considerably reduced so that the reliability of data is in turn lowered. Specially, this problem is more serious in case that SRAM is used in portable electronic device powered by low voltage.